[VIA’s Graveyard] Reviving the VT5910A (Early C7-M + Unknown CN900 chipset)

The VT5910A development board is one of the most interesting boards from the cemetery. 

Unfortunately, I received it in fairly poor condition. All the heatsinks had been brutally torn off, there were scratches on both sides of the PCB, several connectors were damaged, pin headers were bent, some traces were cut, and thermal grease was spread everywhere. After some initial cleaning, this is what it looked like:

VIA VT5910A Development Board
VIA VT5910A Development Board

I repaired most of the damaged connectors and PCB traces, but the board still had 12 V shorted to ground somewhere. I eventually traced the short to one of the dead decoupling capacitors, which was visibly bulging and leaking.

Original caps bulging and leaking
Replaced capacitors and new heatsinks!
Replaced capacitors and new heatsinks!

After replacing all the defective capacitors with brand-new Rubycon caps, I had to find suitable replacement heatsinks. The CPU cooler uses a 41 × 41 mm mounting-hole spacing, similar to the Pentium M reference cooler. I found a compatible one, reassembled everything with fresh thermal paste, powered the board on… and it booted!

Now let’s take a closer look at what this board actually is. The VT5910A is a full-size ATX development board assembled in mid-2005, with many features that were still in an early stage at the time. The soldered engineering-sample CPU is a VIA C7-M clocked at 1.80 GHz, in a NanoBGA2 package, with CPUID 0x6A9. This processor had only just been announced, and mass availability would not come until the following year. My original C7 review on x86-secret.com was published in May 2006.

VIA C7-M 1.80 GHz Engineering Sample
VIA C7-M 1.80 GHz Engineering Sample

The C7-M, based on the Esther (C5J) core, is a low-power x86 microprocessor family introduced by VIA in 2005 and designed by Centaur Technology. Fabricated on a 90 nm process, it targets embedded, mobile, and compact desktop systems where power efficiency and small form factor are more important than high-end performance. The C7 implements a single-core IA-32 architecture with support for common SIMD extensions up to SSE3, and it includes VIA’s PadLock security engine for hardware-assisted.

The Esther core connects to the chipset through VIA’s proprietary V4 front-side bus, with effective bus rates commonly specified at 400, 533, or 800 MT/s depending on the processor model. Although the package was mechanically related to Intel’s Pentium M Socket 479 ecosystem, the V4 bus did not use Intel’s AGTL+ quad-pumped (QDR) electrical interface. It was a VIA-specific signaling implementation intended to provide similar platform integration without being electrically compatible with Intel’s bus to avoid legal issues. On the VT5910A, the CPU is linked to the unreleased (and even unannounced) CN900 chipset:

Unreleased VIA CN900 Northbridge
Unreleased VIA CN900 Northbridge

While the CN400, CN700, and CN800 are well documented, I have not found any public reference to a CN900 chipset. This Northbridge shares the same PCI ID and BIOS reference ID as the P4M800 Pro, which was announced in September 2005. The P4M800 Pro was originally designed for the Pentium 4 bus, then later adapted for VIA’s C7 bus and eventually released as the CN700. Internally, both the P4M800 Pro and CN700 are known as the VT3344 Northbridge. The later CN800 dropped AGP in favor of PCI Express, so it is clearly a newer chip. My best guess is that CN900 was a preliminary development name that was later changed to CN700.

The CN900 includes an integrated S3 UniChrome Pro IGP, internally connected through AGP 8x. It also supports an external AGP 8x slot. Both DDR and DDR2 memory are supported. The VT5910A development board has two DDR2 slots, supporting up to DDR2-667, and one DDR slot, supporting up to DDR-400. This is rather uncommon, but it makes sense for a development board intended to test both memory generations. The PLL and DIP switches show a supported FSB range from 100 MHz all the way up to 400 MHz, which is quite extreme. Another very interesting aspect of the VT5910A is the Southbridge it uses: the VT8251.

Early VT8251 SouthBridge

Back in 2005, VIA, like many other third-party chipset suppliers, was still tied to the aging VT8237 Southbridge. It lacked several modern technologies introduced by Intel in 2003 and 2004, including HD Audio, SATA-II, and, most importantly, PCI Express. The VT8251 Southbridge present on this board was still at an early stage of development. It is quite rare to find a board combining PCI, AMR, AGP, and PCI Express slots.

The BIOS bootup string is “(CC591015) EVALUATION ROM – NOT FOR SALE” and the BIOS ID string is “09/13/2005-P4M800Pro-823-6A7L6009C-00”. Menus have various debugging settings, as expected.

 

The 6A7L6009C identifier was also used on some commercial boards featuring the P4M800 Pro, such as the MSI MS-7104 and the Top Star TM-P5M8Pro. However, both of those boards use the older VT8237 Southbridge. The only known commercial board pairing the P4M800 Pro with the VT8251 Southbridge appears to be the ASUS P5VDC-MX.

The VT5910A BIOS is available here for download: VT5910A_BIOS