Category: MB Analysis

The VT5910A development board is one of the most interesting boards from the cemetery. 

Unfortunately, I received it in fairly poor condition. All the heatsinks had been brutally torn off, there were scratches on both sides of the PCB, several connectors were damaged, pin headers were bent, some traces were cut, and thermal grease was spread everywhere. After some initial cleaning, this is what it looked like:

I repaired most of the damaged connectors and PCB traces, but the board still had 12 V shorted to ground somewhere. I eventually traced the short to one of the dead decoupling capacitors, which was visibly bulging and leaking.

After replacing all the defective capacitors with brand-new Rubycon caps, I had to find suitable replacement heatsinks. The CPU cooler uses a 41 × 41 mm mounting-hole spacing, similar to the Pentium M reference cooler. I found a compatible one, reassembled everything with fresh thermal paste, powered the board on… and it booted!

Now let’s take a closer look at what this board actually is. The VT5910A is a full-size ATX development board assembled in mid-2005, with many features that were still in an early stage at the time. The soldered engineering-sample CPU is a VIA C7-M clocked at 1.80 GHz, in a NanoBGA2 package, with CPUID 0x6A9. This processor had only just been announced, and mass availability would not come until the following year. My original C7 review on x86-secret.com was published in May 2006.

The C7-M, based on the Esther (C5J) core, is a low-power x86 microprocessor family introduced by VIA in 2005 and designed by Centaur Technology. Fabricated on a 90 nm process, it targets embedded, mobile, and compact desktop systems where power efficiency and small form factor are more important than high-end performance. The C7 implements a single-core IA-32 architecture with support for common SIMD extensions up to SSE3, and it includes VIA’s PadLock security engine for hardware-assisted.

The Esther core connects to the chipset through VIA’s proprietary V4 front-side bus, with effective bus rates commonly specified at 400, 533, or 800 MT/s depending on the processor model. Although the package was mechanically related to Intel’s Pentium M Socket 479 ecosystem, the V4 bus did not use Intel’s AGTL+ quad-pumped (QDR) electrical interface. It was a VIA-specific signaling implementation intended to provide similar platform integration without being electrically compatible with Intel’s bus to avoid legal issues. On the VT5910A, the CPU is linked to the unreleased (and even unannounced) CN900 chipset:

While the CN400, CN700, and CN800 are well documented, I have not found any public reference to a CN900 chipset. This Northbridge shares the same PCI ID and BIOS reference ID as the P4M800 Pro, which was announced in September 2005. The P4M800 Pro was originally designed for the Pentium 4 bus, then later adapted for VIA’s C7 bus and eventually released as the CN700. Internally, both the P4M800 Pro and CN700 are known as the VT3344 Northbridge. The later CN800 dropped AGP in favor of PCI Express, so it is clearly a newer chip. My best guess is that CN900 was a preliminary development name that was later changed to CN700.

The CN900 includes an integrated S3 UniChrome Pro IGP, internally connected through AGP 8x. It also supports an external AGP 8x slot. Both DDR and DDR2 memory are supported. The VT5910A development board has two DDR2 slots, supporting up to DDR2-667, and one DDR slot, supporting up to DDR-400. This is rather uncommon, but it makes sense for a development board intended to test both memory generations. The PLL and DIP switches show a supported FSB range from 100 MHz all the way up to 400 MHz, which is quite extreme. Another very interesting aspect of the VT5910A is the Southbridge it uses: the VT8251.

Back in 2005, VIA, like many other third-party chipset suppliers, was still tied to the aging VT8237 Southbridge. It lacked several modern technologies introduced by Intel in 2003 and 2004, including HD Audio, SATA-II, and, most importantly, PCI Express. The VT8251 Southbridge present on this board was still at an early stage of development. It is quite rare to find a board combining PCI, AMR, AGP, and PCI Express slots.

The BIOS bootup string is “(CC591015) EVALUATION ROM – NOT FOR SALE” and the BIOS ID string is “09/13/2005-P4M800Pro-823-6A7L6009C-00”. Menus have various debugging settings, as expected.

 

The 6A7L6009C identifier was also used on some commercial boards featuring the P4M800 Pro, such as the MSI MS-7104 and the Top Star TM-P5M8Pro. However, both of those boards use the older VT8237 Southbridge. The only known commercial board pairing the P4M800 Pro with the VT8251 Southbridge appears to be the ASUS P5VDC-MX.

The VT5910A BIOS is available here for download: VT5910A_BIOS

 

At first sight, the VT5426D board is very similar to the previously analyzed VT5292A. Both are based on the Apollo PLE133 chipset with a VT8601A Northbridge, and large areas of the PCB, especially around the CPU and VRMs, are almost identical. On the newer board, we can also notice the lack of a third SDRAM slot, the missing ISA slot, and the last PCI slot replaced with an ACR slot (physically a reversed PCI slot slightly shifted toward the rear).

The ACR (Advanced Communication Riser) was a short-lived PC expansion-card standard introduced around 2000 as a successor or alternative to AMR and CNR. It was developed by the ACR Special Interest Group, founded by companies including 3Com, AMD, ALi, Conexant, Lucent, Motorola and VIA. It provided a low-cost riser slot for communication and multimedia functions such as software modems, LAN, broadband, wireless networking, and AC’97 audio, while relying on the motherboard chipset for much of the logic. In practice, ACR was mainly used on a limited number of early-2000s motherboards and was quickly phased-out by more integrated onboard functions.

But the main difference is obviously the Southbridge, as the VT5426D is based on the newer VIA VT8231, while the previous VT5292A used the older 686B. The difference between the two is small: basically, the VT8231 is a 686B with an integrated 10/100 Ethernet MAC controller. That’s quite strange, because the VT5426D does not have an onboard PHY to make it usable. My first guess was that this board may have been used specifically to debug an ACR card, which could carry a simple PHY and provide a cheap network interface. But the timeline does not quite match: this VT5426D is a late-2001 board using an early-2002 chipset, while the first ACR 1.0 specification was announced in February 2000, almost two years earlier.

So why the hell did VIA produce a new development motherboard lacking the required PHY and RJ45 connector to test the only new feature of its new Southbridge? Let’s try to boot this board and continue the investigation. Fortunately, as with the previous one, it has very little damage and no bad capacitors (I promise this won’t be the case with all the other boards…). The board booted fine on the first try. 

The Award BIOS string identifier for the VT5426D is “01/15/2001-601-8231-6A6LO009C-00”.
The startup string is “(601A0115) EVALUATION ROM – NOT FOR SALE”.

That’s quite interesting. The BIOS is dated January 2001, while the board appears to have been assembled more than a year later: the chipset manufacturing date is late February 2002. This is very unusual, as BIOSes from this era were usually updated quite frequently to support the latest CPUs. The only reason to use such an old BIOS would be for a fixed hardware configuration over a long-term period, for example with the same CPU. Indeed, all mentions of settings dedicated to supporting various CPUs, which were present on the VT5292A, have been removed from the PCB silkscreen.

But the most obvious hint about the true nature of this board is the BIOS identifier: “6A6LO009C”. This exact ID was used by VIA for the very first EPIA board, announced in April 2002. EPIA, for Embedded Platform Innovative Architecture, was VIA’s compact motherboard family for low-power embedded and small-form-factor x86 systems, introduced in the early 2000s as part of the company’s push toward highly integrated “platform” designs. Built around VIA C3/Eden processors and VIA chipsets, EPIA boards combined the CPU, graphics, audio, networking, storage, and legacy I/O on very small Mini-ITX boards (a very compact 17 × 17 cm form factor introduced at the same time and still used today).

It looks like VIA gradually shrank a PLE133 reference board, from MicroATX to the initially proposed “ITX” form factor, and finally to the much more ambitious Mini-ITX form factor, with the following timeline:

• • January 2001 : VT5426D Development MicroATX form factor (24.4 x 24.4 cm), Socket 370.

  • March 2001 : VT6009 Development board in the first proposed ITX form factor (21.5 x 19.1 cm), Socket 370. Note the ACR port. Following the success of this board at CeBit 2002, VIA probably decided to shrink the form factor even more.

  • November 2001 : VT6010 Reference board for the final Mini-ITX form factor (17 x 17 cm), Soldered VIA Eden ESP (low voltage VIA C3)

  • April 2002 : First commercial Mini-ITX boards under the EPIA line. Soldered C3 (EPIA 800, fan) or Eden (ESP 5000, fangless) CPU.

All these boards are based on the Apollo PLE133 chipset with the VT8231 Southbridge and use the same overall schematics, with the same PLL, audio codec, BIOS flash chip, and a similar architecture.

These boards were so similar, and the VT5426D shares so much with the final EPIA board, including its BIOS identifier, that I had a crazy idea: what would happen if I flashed the commercial EPIA BIOS onto the VT5426D? Had VIA removed support for Intel CPUs from the final EPIA BIOS, considering that commercial EPIA boards were only available with soldered VIA CPUs? Or had they kept the code inherited from older development boards, which supported any Socket 370 CPU? Let’s try it.

Bingo! The board booted immediately with the EPIA logo and was fully functional, except for the missing network part. It’s quite odd to see a VIA EPIA BIOS running with an Intel Celeron Coppermine CPU. So, in the end, the best guess is that the VT5426D was the missing link that ultimately led to the first EPIA Mini-ITX board.

You can download the original VT5426D BIOS, dated 01/15/2001, here: VT5426D_BIOS

 

Let’s continue the series with another one of the least damaged boards: the VT5292A, built around the Apollo PLE133 chipset, with a VT8601A Northbridge and a VIA VT82C686B Southbridge. This chipset was the direct successor to the MVP4 in VIA’s “integrated” chipset line, with built-in graphics. This time, we have Socket 370 and three SDRAM slots supporting PC66, PC100, and PC133 modules, up to 1.5 GB. The IGP is still from Trident, but upgraded to their Blade3D line. The 686B Southbridge supports USB 1.1 via UHCI, IDE ATA-33/66/100, AC’97 audio, PCI 2.2, and an integrated Super I/O controller. It also includes an integrated PCI-to-ISA bridge.

The board arrived quite clean, without major damage and with capacitors that were visually in good condition. Many jumpers were unfortunately undocumented, and it took quite a long time to figure out how to boot a Celeron or Pentium III Coppermine. The VT5292A supports FSB settings from 66 to 133 MHz and requires jumper configuration to select between three CPU types: “Cyrix”, “Old Intel”, and “New Intel”. The latter is obviously for Coppermine CPUs, while the “Cyrix” setting was targeted at VIA C3s, formerly Cyrix III.

The Award BIOS string identifier for the VT5292A is “03/20/2002-601-686B-6A6LI00AC-00”. The startup string is “(2798a72) EVALUATION ROM – NOT FOR SALE”. The mainboard identifier, “6A6LI00AC”, is the same as on the Soyo SY-7VEM, which looks almost identical except for the number of DIMM slots: the Soyo only has two slots, while the VT5292A has three. The location of some headers is also slightly different, but it looks like Soyo simply rebranded the Apollo PLE133 reference board as its own model, which was quite common back then.

The BIOS has a lot of debugging options, especially related to the IDE controller. This may be related to the onboard VT82C686B, the first VIA Southbridge to support ATA-100; the previous 686A was limited to ATA-66. The rest of the BIOS is quite standard, with a decent temperature, voltage, and fan-speed monitoring page. The CPU temperature sensor is still external on this board, with a thermocouple positioned just behind the CPU. This board may look like one of the least interesting ones at first, but it will soon become more important, as it represents an evolutionary step toward the next board we will check: the VT5426D.

The VT5292A motherboard BIOS is available here: VT5292A_BIOS

Some years ago, one of the last remaining VIA R&D facilities closed its doors, and I was lucky enough to save a bunch of motherboards from the salvage bin. Most of them were rare reference boards and development boards from the late ’90s and early 2000s, with sockets ranging from Socket 7 to Socket A/423, or with embedded VIA CPUs.Unfortunately, all these boards had already been prepared for e-waste, with some components, such as heatsinks, brutally ripped off before the boards were roughly tossed into a bin, causing various damage to the components and PCBs.In this series, I will try to get them working one by one, repairing the damage they suffered and documenting my findings.

Let’s start with one of the less damaged boards. This VIA VT5182E MicroATX reference motherboard is built around the Apollo MVP4 chipset, with a VT8501 Northbridge and a VIA VT82C686A Southbridge. It’s a “Super” Socket 7 board, supporting later Socket 7 CPUs, including 100 MHz FSB chips such as the Cyrix MII, the AMD K6-2 and K6-III, the IDT WinChip 2, and others. The VT8501 can also work with FPM/EDO DIMMs, but this board only supports modern PC66/PC100 SDRAM. There is no AGP slot here because the VT8501 already integrates a Trident CyberBlade i7 IGP, or integrated graphics processor, on the internal AGP bus, using shared memory. The 686A Southbridge supports USB 1.1 via UHCI, IDE ATA-33/66, AC’97 audio, PCI 2.2, and an integrated Super I/O controller.

The VT5182E reference board had little damage, withonly a couple of scratches on the PCB and no cut traces. There were no bulging capacitors either. The board has quite a lot of jumpers, with FSB selection from 66 to 124 MHz, multiplier settings from 1.5x to 5.5x, and Vcore from 2.0 V to 3.5 V. A UMC UM616464AF-5 chip adds 512 KB of L2 cache. The only oddity is a very (very) bad rework near the audio jack, with various THT components, including resistors and capacitors, soldered Manhattan-style and brutally glued together into one big messy blob. It was probably a quick-and-dirty fix by an engineer in the lab.

The board was able to boot with a PCI graphics card, but the onboard VGA port only displays a corrupted image. Resoldering the VGA port solved the issue. The Award BIOS string identifier for the VT5182E is “04/13/1999-VP4-686-2A5LE00DC-00”. The startup string is “(R34-5182) EVALUATION ROM – NOT FOR SALE”. The BIOS is fully featured, as expected for a reference board, but lacks the shiny jumper-less configuration feature.

Let’s now guess what this board was used for. The Apollo MVP4 chipset was announced in August 1998, with availability in Q4’98. This VT5182E board has a BIOS dated April 1999. According to their engraved date codes, almost all components of the boards (Northbridge, cache chip, PLLs, EEPROM, MOSFETs, etc.) were manufactured between Q3’98 and Q1’99. The real oddity is the 686A Southbridge, dated WW23’2000, more than a year later. It’s almost certain that the Southbridge on this board was replaced at some point with a much newer revision. The timeline coincides with the development of the 686B Southbridge, which added ATA-100 and fixed some bugs, while adding a couple of new ones.

The VT5182E motherboard BIOS is available here: VT5182E_BIOS